000 -LEADER |
fixed length control field |
a |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
220601b xxu||||| |||| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9789387067509 |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.395 |
Item number |
UNS |
100 ## - MAIN ENTRY--PERSONAL NAME |
Personal name |
Unsalan, Cem |
245 ## - TITLE STATEMENT |
Title |
Digital system design with FPGA : implementation using Verilog and VHDL |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
Name of publisher, distributor, etc |
McGraw Hill Education, |
Date of publication, distribution, etc |
2017 |
Place of publication, distribution, etc |
Chennai : |
300 ## - PHYSICAL DESCRIPTION |
Extent |
xv, 384 p. ; |
Other physical details |
ill., |
Dimensions |
24 cm |
365 ## - TRADE PRICE |
Price amount |
750.00 |
Price type code |
INR |
Unit of pricing |
01 |
504 ## - BIBLIOGRAPHY, ETC. NOTE |
Bibliography, etc |
Includes bibliographical references and index. |
520 ## - SUMMARY, ETC. |
Summary, etc |
This practical guide explores the development and deployment of FPGA-based digital systems using the two most popular hardware description languages, Verilog and VHDL. Written by a pair of digital circuit design experts, the book offers a solid grounding in FPGA principles, practices, and applications and provides an overview of more complex topics. Important concepts are demonstrated through real-world examples, ready-to-run code, and inexpensive start-to-finish projects for both the Basys3 and Arty boards. |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Field Programmable Gate Arrays |
|
Topical term or geographic name as entry element |
Computer hardware description language |
|
Topical term or geographic name as entry element |
Adders |
|
Topical term or geographic name as entry element |
Arithmetic operations |
|
Topical term or geographic name as entry element |
Arty board |
|
Topical term or geographic name as entry element |
Clock management tile(CMT) |
|
Topical term or geographic name as entry element |
Combinational circuit |
|
Topical term or geographic name as entry element |
Dataflow model |
|
Topical term or geographic name as entry element |
Digital clock |
|
Topical term or geographic name as entry element |
Floating point |
|
Topical term or geographic name as entry element |
Verilog description |
|
Topical term or geographic name as entry element |
Intellectual property |
|
Topical term or geographic name as entry element |
Logic function |
|
Topical term or geographic name as entry element |
MicroBlaze |
|
Topical term or geographic name as entry element |
Multiplexer |
|
Topical term or geographic name as entry element |
PicoBlaze |
|
Topical term or geographic name as entry element |
Sequential Circuit |
|
Topical term or geographic name as entry element |
Seven-segment display |
|
Topical term or geographic name as entry element |
Testbench formation |
|
Topical term or geographic name as entry element |
UART |
|
Topical term or geographic name as entry element |
Vector operations |
|
Topical term or geographic name as entry element |
VHOL |
|
Topical term or geographic name as entry element |
Vivado design sulte |
|
Topical term or geographic name as entry element |
Xilinx Artix-7 |
|
Topical term or geographic name as entry element |
Xor gate |
|
Topical term or geographic name as entry element |
Vivado |
|
Topical term or geographic name as entry element |
Time alarm system |
700 ## - ADDED ENTRY--PERSONAL NAME |
Personal name |
Tar, Bora |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
|
Item type |
Books |