| 000 -LEADER |
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| fixed length control field |
a |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
230417b xxu||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9781032061719 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
006.31 |
| Item number |
SAI |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Saini, Sandeep |
| Relator term |
ed. |
| 245 ## - TITLE STATEMENT |
|---|
| Title |
VLSI and hardware implementations using modern machine learning methods |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Name of publisher, distributor, etc |
CRC Press , |
| Date of publication, distribution, etc |
2022 |
| Place of publication, distribution, etc |
Boca Raton : |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xv, 312 p. ; |
| Other physical details |
ill. |
| Dimensions |
24 cm |
| 365 ## - TRADE PRICE |
|---|
| Price amount |
115.00 |
| Price type code |
GBP |
| Unit of pricing |
104.20 |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
|---|
| Bibliography, etc |
Includes bibliographical references and index. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc |
Machine learning is a potential solution to resolve bottleneck issues in VLSI via optimizing tasks in the design process. This book aims to provide the latest machine learning based methods, algorithms, architectures, and frameworks designed for VLSI design. Focus is on digital, analog, and mixed-signal design techniques, device modeling, physical design, hardware implementation, testability, reconfigurable design, synthesis and verification, and related areas. It contains chapters on case studies as well as novel research ideas in the given field. Overall, the book provides practical implementations of VLSI design, IC design and hardware realization using machine learning techniques. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Machine learning |
|
|---|
| Topical term or geographic name as entry element |
VLSI |
|
|---|
| Topical term or geographic name as entry element |
Integrated circuits |
|
|---|
| Topical term or geographic name as entry element |
construction Data processing |
|
|---|
| Topical term or geographic name as entry element |
Approximate computing |
|
|---|
| Topical term or geographic name as entry element |
Binary convolutional neural network |
|
|---|
| Topical term or geographic name as entry element |
Circuit feature analysis |
|
|---|
| Topical term or geographic name as entry element |
Digital image processing |
|
|---|
| Topical term or geographic name as entry element |
Field programmable gate arrays(FPGAs) |
|
|---|
| Topical term or geographic name as entry element |
Hardware Trojans |
|
|---|
| Topical term or geographic name as entry element |
Look-up table(LuT) |
|
|---|
| Topical term or geographic name as entry element |
Photonic Neural network |
|
|---|
| Topical term or geographic name as entry element |
Reinforcement learning |
|
|---|
| Topical term or geographic name as entry element |
Supervised learning |
|
|---|
| Topical term or geographic name as entry element |
Threshold implementation |
|
|---|
| Topical term or geographic name as entry element |
Hardware security |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Lata, Kusum |
| Relator term |
ed. |
|
|---|
| Personal name |
Sinha, G. R |
| Relator term |
ed. |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
|
| Item type |
Books |