| 000 -LEADER |
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| fixed length control field |
nam a22 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
231128b xxu||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9783030075507 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
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| Classification number |
621.3815 |
| Item number |
CHA |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Chandrasekharan, Arun |
| 245 ## - TITLE STATEMENT |
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| Title |
Design Automation Techniques for Approximation Circuits : Verification, Synthesis and Test |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
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| Name of publisher, distributor, etc |
Springer, |
| Date of publication, distribution, etc |
2019 |
| Place of publication, distribution, etc |
Cham : |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xix, 130 p. ; |
| Other physical details |
ill., |
| Dimensions |
23 cm |
| 365 ## - TRADE PRICE |
|---|
| Price amount |
49.99 |
| Price type code |
EUR |
| Unit of pricing |
91.70 |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
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| Bibliography, etc |
Includes bibliographical references and index. |
| 520 ## - SUMMARY, ETC. |
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| Summary, etc |
This book describes reliable and efficient design automation techniques for the design and implementation of an approximate computing system. The authors address the important facets of approximate computing hardware design - from formal verification and error guarantees to synthesis and test of approximation systems. They provide algorithms and methodologies based on classical formal verification, synthesis and test techniques for an approximate computing IC design flow. This is one of the first books in Approximate Computing that addresses the design automation aspects, aiming for not only sketching the possibility, but providing a comprehensive overview of different tasks and especially how they can be implemented. Provides a general overview of approximate computing hardware design; Offers a detailed explanation of the formal verification problem for approximate hardware; Explains in detail several algorithms for the synthesis and verification of an approximate hardware; Includes an overview of the post production test for approximation circuits and methodologies to potentially improve the yield of the fabrication process; Uses case studies and experimental results to depict the problem and usefulness of the approach. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Approximation algorithms |
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| Topical term or geographic name as entry element |
Computer architecture & logic design |
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| Topical term or geographic name as entry element |
System design |
|
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| Topical term or geographic name as entry element |
Technology & Engineering Electronics General |
|
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| Topical term or geographic name as entry element |
Approximate computing |
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| Topical term or geographic name as entry element |
Design automation |
|
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| Topical term or geographic name as entry element |
Formal verification |
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| Topical term or geographic name as entry element |
Hardware architecture |
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| Topical term or geographic name as entry element |
Test strategies |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
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| Personal name |
Große, Daniel |
|
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| Personal name |
Drechsler, Rolf |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
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| Source of classification or shelving scheme |
|
| Item type |
Books |