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Details for: SystemVerilog for verification : a guide to learning the testbench language features
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SystemVerilog for verification : a guide to learning the testbench language features
By:
Spear, Chris
.
Material type:
Book
Publisher:
New York:
Springer,
2006
Description:
xix, 301 p.; ill., index: 24 cm
.
ISBN:
9780387270364 .
Subject(s):
Integrated circuits -- Verification
|
OPP
|
Verilog (Computer hardware description language)
DDC classification:
621.392
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