Hardware/Software Co-Design and Co-Verification
By: Berge, Jean-Michel.
Contributor(s): Levia, Oz | Rouillard, Jacques.
Material type:
BookPublisher: London: Kluwer Academic Publishers, 1997Description: 165 p.; Illus. Index: 24 cm.ISBN: 9780792396895 .Subject(s): Co-Design Methodology | Communication Modeling | Communication Protocol Modeling | Communication Systems | Digital System SimulationDDC classification: 621.392
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
| Books | 621.392 BER (Browse shelf) | Available | 002972 |
Browsing DAIICT Shelves Close shelf browser
| 621.392 ASH Designer's guide to VHDL | 621.392 BEN Principles of verifiable RTL design : a functional coding style supporting verification processes in verilog | 621.392 BER Scalable hardware verification with symbolic simulation | 621.392 BER Hardware/Software Co-Design and Co-Verification | 621.392 BHA System verilog primer | 621.392 BHA A VHDL synthesis primer | 621.392 BOT HDL programming fundamentals : VHDL and Verilog |
There are no comments for this item.