VLSI memory chip design
By: Itoh, Kiyoo.
Material type:
BookSeries: Springer series in adanced microelectronics.Publisher: New Delhi: Springer, 2006Description: xi, 495 p.; ill., index: 24 cm.ISBN: 818128450X .Subject(s): Integrated circuits -- Very large scale integration -- Design and construction | Semiconductor storage devices -- Design and constructionDDC classification: 621.39732
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
| Books | 621.39732 ITO (Browse shelf) | Available | 015296 |
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| 621.39732 GOE Systematic design for optimisation of pipelined ADCs | 621.39732 GUS CMOS data coverters for communications | 621.39732 HAR CMOS Memory Circuits | 621.39732 ITO VLSI memory chip design | 621.39732 KEE DRAM circuit design : fundamental to high-speed topics | 621.39732 KUR Multi-voltage CMOS circuit design | 621.39732 LAN Compact low-voltage and high-speed CMOS, BiCMOS, and bipolar operational amplifiers |
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