Designer's guide to VHDL
By: Ashenden, Peter J.
Material type:
BookSeries: Morgan Kaufmann series in systems on silicon.Publisher: New Delhi: Morgan Kaufmann, 2003Edition: 2nd ed.Description: xxiv, 759 p.; ill., index: 24 cm.ISBN: 818147192X .Subject(s): Computer hardware description language | Electronic digital computers -- Computer simulation | VHDLDDC classification: 621.392
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
| Books | 621.392 ASH (Browse shelf) | Available | 010256 | ||
| Books | 621.392 ASH (Browse shelf) | Available | 008913 |
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| 621.392 ARN Verilog digital computer design : algorithms into hardware | 621.392 ASH Student's guide to VHDL | 621.392 ASH Designer's guide to VHDL | 621.392 ASH Designer's guide to VHDL | 621.392 BEN Principles of verifiable RTL design : a functional coding style supporting verification processes in verilog | 621.392 BER Scalable hardware verification with symbolic simulation | 621.392 BER Hardware/Software Co-Design and Co-Verification |
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