Design through Verilog HDL
By: Padmanabhan, T. R.
Contributor(s): Tripura Sundari, B. Bala.
Material type:
BookPublisher: New Jersey: IEEE Press, 2003Description: xii, 455 p.; ill., index: 24 cm.ISBN: 0471441481 .Subject(s): Verilog -Computer hardware description languageDDC classification: 621.392
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
| Books | 621.392 PAD (Browse shelf) | Available | 008572 |
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| 621.392 NAV Verilog Digital System Design | 621.392 NAV VHDL : modular design and synthesis of cores and systems | 621.392 NAV Verilog digital system design : RT level synthesis, testbench and verification | 621.392 PAD Design through Verilog HDL | 621.392 PAL Design verification with E | 621.392 PED Digital electronics and design with VHDL | 621.392 PED Finite state machines in hardware : theory and design (with VHDL and SystemVerilog) |
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