Principles of verifiable RTL design : a functional coding style supporting verification processes in verilog
By: Bening, Lionel.
Contributor(s): Foster, Harry D.
Material type:
BookPublisher: London: Kluwer Academic Publishers, 2000Description: 253 p.; ill., index.: 24 cm.ISBN: 0792377885 .Subject(s): Communication Systems | Electronic Digital Computers | Verification Process | Verification Processes in Verilog | Very Large Scale IntegrationDDC classification: 621.392
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
| Books | 621.392 BEN (Browse shelf) | Available | 002970 |
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| 621.392 ASH Student's guide to VHDL | 621.392 ASH Designer's guide to VHDL | 621.392 ASH Designer's guide to VHDL | 621.392 BEN Principles of verifiable RTL design : a functional coding style supporting verification processes in verilog | 621.392 BER Scalable hardware verification with symbolic simulation | 621.392 BER Hardware/Software Co-Design and Co-Verification | 621.392 BHA System verilog primer |
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