Formal semantics and proof techniques for optimizing VHDL models
By: Umamageswaran, Kothanda.
Contributor(s): Pandey, Sheetanshu L | Wilsey, Philip A.
Material type:
BookPublisher: Boston: Kluwer Academic Publishers, 1999Description: xvi, 158 p.; ill.: 24 cm.ISBN: 0792383753 .Subject(s): VHDL (Computer hardware description language)DDC classification: 621.392
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
| Books | 621.392 UMA (Browse shelf) | Available | 013995 |
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