| 000 | 00671nam a2200181Ia 4500 | ||
|---|---|---|---|
| 008 | 161214s9999 xx 000 0 und d | ||
| 020 |
_a9780262019668 _c(hbk) |
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| 082 |
_223 _a621.392 _bPED |
||
| 100 | _aPedroni, Volnei A. | ||
| 245 | 0 | _aFinite state machines in hardware : theory and design (with VHDL and SystemVerilog) | |
| 260 |
_aCambridge: _bMIT Press, _c2013 |
||
| 300 |
_ax, 337 p.; _bill.: _c24 cm. |
||
| 650 | _aComputer systems -- Mathematical models | ||
| 650 | _aSequential machine theory -- Data processing | ||
| 650 | _aSystemVerilog (Computer hardware description language) | ||
| 650 | _aVHDL (Computer hardware description language) | ||
| 942 |
_2ddc _cBK |
||
| 999 |
_c13752 _d13752 |
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