000			00560nam a2200169Ia 4500
008			161214s9999 xx 000 0 und d
020			_a9780387270364 _c(hbk)
082			_223 _a621.392 _bSPE
100			_aSpear, Chris
245		0	_aSystemVerilog for verification : a guide to learning the testbench language features
260			_aNew York: _bSpringer, _c2006
300			_axix, 301 p.; _bill., index: _c24 cm.
650			_aIntegrated circuits -- Verification
650			_aOPP
650			_aVerilog (Computer hardware description language)
942			_2ddc _cBK
999			_c14613 _d14613