000			00548nam a2200169Ia 4500
999			_c20092 _d20092
008			161214s9999 xx 000 0 und d
020			_a9781402077104 _c(hbk)
082			_a621.395 _bSTI
100			_aStine, James E.
245		0	_aDigital computer arithmetic datapath design using verilog HDL
260			_aBoston: _bKluwer Academic Publishers, _c2004
300			_axi, 180 p.; _bill.: _c24 cm.
650			_aComputer arithmetic
650			_aDigital electronics
650			_aVerilog (Computer hardware description language)
942			_2ddc _cBK