000			00703nam a2200205Ia 4500
008			161214s9999 xx 000 0 und d
020			_a0387310045 _c(pbk)
082			_223 _a621.395 _bHAC
100			_aHachtel, Gary D.
245		0	_aLogic synthesis and verification algorithms
260			_aNew York: _bSpringer, _c2006
300			_axxiii, 562 p.; _bill: _c24 cm.
650			_aComputer-aided design
650			_aIntegrated circuits -- Verification
650			_aIntegrated circuits -- Very large scale integration -- Design -- Data processing
650			_aIntegrated circuits Design Use of Computers
650			_aLogic design -- Data processing
700			_aSomenzi, Fabio
942			_2ddc _cBK
999			_c2053 _d2053