000 | a | ||
---|---|---|---|
999 |
_c30826 _d30826 |
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008 | 220601b xxu||||| |||| 00| 0 eng d | ||
020 | _a9789387067509 | ||
082 |
_a621.395 _bUNS |
||
100 | _aUnsalan, Cem | ||
245 | _aDigital system design with FPGA : implementation using Verilog and VHDL | ||
260 |
_bMcGraw Hill Education, _c2017 _aChennai : |
||
300 |
_axv, 384 p. ; _bill., _c24 cm |
||
365 |
_b750.00 _cINR _d01 |
||
504 | _aIncludes bibliographical references and index. | ||
520 | _aThis practical guide explores the development and deployment of FPGA-based digital systems using the two most popular hardware description languages, Verilog and VHDL. Written by a pair of digital circuit design experts, the book offers a solid grounding in FPGA principles, practices, and applications and provides an overview of more complex topics. Important concepts are demonstrated through real-world examples, ready-to-run code, and inexpensive start-to-finish projects for both the Basys3 and Arty boards. | ||
650 | _aField Programmable Gate Arrays | ||
650 | _aComputer hardware description language | ||
650 | _aAdders | ||
650 | _aArithmetic operations | ||
650 | _aArty board | ||
650 | _a Clock management tile(CMT) | ||
650 | _aCombinational circuit | ||
650 | _aDataflow model | ||
650 | _aDigital clock | ||
650 | _a Floating point | ||
650 | _a Verilog description | ||
650 | _aIntellectual property | ||
650 | _aLogic function | ||
650 | _a MicroBlaze | ||
650 | _aMultiplexer | ||
650 | _aPicoBlaze | ||
650 | _a Sequential Circuit | ||
650 | _a Seven-segment display | ||
650 | _aTestbench formation | ||
650 | _aUART | ||
650 | _aVector operations | ||
650 | _aVHOL | ||
650 | _a Vivado design sulte | ||
650 | _aXilinx Artix-7 | ||
650 | _aXor gate | ||
650 | _aVivado | ||
650 | _a Time alarm system | ||
700 | _aTar, Bora | ||
942 |
_2ddc _cBK |