000 | a | ||
---|---|---|---|
999 |
_c31346 _d31346 |
||
008 | 221129b xxu||||| |||| 00| 0 eng d | ||
020 | _a9783030981112 | ||
082 |
_a621.395 _bCHA |
||
100 | _aChakravarthi, Veena S. | ||
245 | _aSoC physical design : a comprehensive guide | ||
260 |
_bSpringer International Publishing, _c2022 _aCham : |
||
300 |
_axxiv, 155 p. ; _bill., (Some Color) _c24 cm |
||
365 |
_d99.99 _bEUR _c84.50 |
||
504 | _aIncludes bibliographical references and index. | ||
520 | _aSoC Physical Design is a comprehensive practical guide for VLSI designers that thoroughly examines and explains the practical physical design flow of system on chip (SoC). The book covers the rationale behind making design decisions on power, performance, and area (PPA) goals for SoC and explains the required design environment algorithms, design flows, constraints, handoff procedures, and design infrastructure requirements in achieving them. The book reveals challenges likely to be faced at each design process and ways to address them in practical design environments. Advanced topics on 3D ICs, EDA trends, and SOC trends are discussed in later chapters. Coverage also includes advanced physical design techniques followed for deep submicron SOC designs. The book provides aspiring VLSI designers, practicing design engineers, and electrical engineering students with a solid background on the complex physical design requirements of SoCs which are required to contribute effectively in design roles. Provides a comprehensive overview of the skills required for complex SoC design and development; Examines SOC design challenges in nanotechnology scales; Offers readers professional tricks to using tools for optimal design runs. | ||
650 | _aCircuits integres a tres grande echelle | ||
650 | _aIntegrated circuits Very large scale integration | ||
650 | _aSystems on a chip Design | ||
700 | _aKoteshwar, Shivananda R. | ||
942 |
_2ddc _cBK |