000			nam a22 4500
999			_c33121 _d33121
008			240319b xxu||||| |||| 00| 0 eng d
020			_a9783031379888
082			_a005.8 _bZAM
100			_aZamiri Azar, Kimia
245			_aUnderstanding logic locking
260			_bSpringer, _c2024 _aCham :
300			_axvi, 381 p. ; _bill., _c24 cm
365			_d93.50 _b99.99 _c€
504			_aIncludes bibliographical references and index.
520			_aThis book demonstrates the breadth and depth of IP protection through logic locking, considering both attacker/adversary and defender/designer perspectives. The authors draw a semi-chronological picture of the evolution of logic locking during the last decade, gathering and describing all the DO’s and DON’Ts in this approach. They describe simple-to-follow scenarios and guide readers to navigate/identify threat models and design/evaluation flow for further studies. Readers will gain a comprehensive understanding of all fundamentals of logic locking. Covers modern VLSI design, testability and debug, and hardware security threats at different levels of abstraction; Provides a comprehensive overview of logic locking techniques and their applications to hardware security; Covers logic locking from implementation to evaluation, different assumptions, models and abstraction layers.
650			_aComputer security
650			_aIT security
700			_aMardani Kamali, Hadi
700			_aFarahmandi, Farimah
700			_aTehranipoor, Mark
942			_2ddc _cBK