Jespers, Paul G.

gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits : the semi-empirical and compact model approaches - Dordrecht: Springer, 2010 - xvi, 171 p.; ill.: 24 cm. - Analog circuits and signal processing .

9780387471006 (hbk)


Metal oxide semiconductors, Complementary -- Design and construction
Linear integrated circuits -- Design and construction
Low voltage integrated circuits -- Design and construction

621.3815 / JES

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