Logical effort: Designing fast CMOS circuits (Record no. 4898)

000 -LEADER
fixed length control field 00609nam a2200193Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 161214s9999 xx 000 0 und d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 1558605576
Terms of availability (pbk)
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.38152
Item number SUT
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Sutherland, Ivan
245 #0 - TITLE STATEMENT
Title Logical effort: Designing fast CMOS circuits
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc San Francisco:
Name of publisher, distributor, etc Morgan Kaufmann,
Date of publication, distribution, etc 1999
300 ## - PHYSICAL DESCRIPTION
Extent 239 p.;
Other physical details ill., index:
Dimensions 23 cm.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Delay faults(Semiconductors)
Topical term or geographic name as entry element Logic design
Topical term or geographic name as entry element Metal oxid semiconductors-complementary -- design and construction
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Harris, David
Personal name Sproull, Bob
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Item type Books
952 ## - LOCATION AND ITEM INFORMATION (KOHA)
-- 1473Academic Press
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Permanent location Current location Date acquired Source of acquisition Cost, normal purchase price Total Checkouts Full call number Barcode Date last seen Date last borrowed Koha item type
          DAIICT DAIICT 2003-07-23 Books India 0.00 4 621.38152 SUT 006696 2020-01-06 2019-12-24 Books

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