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Logic synthesis and verification algorithms

By: Hachtel, Gary D.
Contributor(s): Somenzi, Fabio.
Material type: materialTypeLabelBookPublisher: New York: Springer, 2006Description: xxiii, 562 p.; ill: 24 cm.ISBN: 0387310045 .Subject(s): Computer-aided design | Integrated circuits -- Verification | Integrated circuits -- Very large scale integration -- Design -- Data processing | Integrated circuits Design Use of Computers | Logic design -- Data processingDDC classification: 621.395
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