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Strain-engineered MOSFETs

By: Maiti C.K.
Contributor(s): Maiti T.K.
Publisher: 2013 Taylor and Francis Group, Boca RatonDescription: xix, 300 p. ; ill., 24 cm.ISBN: 9781466500556.Subject(s): Integrated Circuits Fault Tolerance | Transistors Reliability | Strain | 1/F noise | Bias temperature instability | CMOS technology | Compressive stress | Electron mobility | FinFET | Gate length | Germanium-silicon system | Hole mobility | Integrated circuit | MOSFETS | F-MOSFETs | Shallow trench isolation stress | Silicidation | TCAD | Threshold voltage | Trap density | Valance bandDDC classification: 621.3815284 Summary: This book brings together new developments in the area of spin-engineered MOSFETs using high-mobility substrates such as SIGe, strained-Si, germanium-on-insulator, and III-V semiconductors. The authors cover the materials aspects, principles, design, fabrication, and applications of advanced devices. They present a full TCAD methodology for strain-engineering in Si CMOS technology involving data flow from process simulation to systematic process variability simulation and generation of SPICE process compact models for manufacturing for yield optimization
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Books 621.3815284 MAI (Browse shelf) Available 033884

includes index

This book brings together new developments in the area of spin-engineered MOSFETs using high-mobility substrates such as SIGe, strained-Si, germanium-on-insulator, and III-V semiconductors. The authors cover the materials aspects, principles, design, fabrication, and applications of advanced devices. They present a full TCAD methodology for strain-engineering in Si CMOS technology involving data flow from process simulation to systematic process variability simulation and generation of SPICE process compact models for manufacturing for yield optimization

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