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Logical effort: Designing fast CMOS circuits

By: Sutherland, Ivan.
Contributor(s): Harris, David | Sproull, Bob.
Material type: materialTypeLabelBookPublisher: San Francisco: Morgan Kaufmann, 1999Description: 239 p.; ill., index: 23 cm.ISBN: 1558605576 .Subject(s): Delay faults(Semiconductors) | Logic design | Metal oxid semiconductors-complementary -- design and constructionDDC classification: 621.38152
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